Qualcomm Inc. v. Apple Inc.

Qualcomm Inc. v. Apple Inc.

Opinion

Chen, Circuit Judge.

Qualcomm Inc. (Qualcomm) appeals from two related inter partes review (IPR) decisions of the Patent Trial and Appeal Board (Board) finding several claims of Qualcomm's U.S. Patent No. 8,063,674 ('674 patent) unpatentable under 35 U.S.C. § 103.¹ To reach its unpatentability finding, the Board relied on a ground raised by Apple Inc. (Apple) that relied in part on applicant admitted prior [*2]  art (AAPA)—here, statements in the challenged patent acknowledging that most of the limitations of the patent's claims were already known—and a prior art patent. ] Qualcomm argues the Board's reliance on AAPA runs afoul of 35 U.S.C. § 311(b), which limits an inter partes review petitioner to challenge claims as unpatentable "only on a ground that could be raised under section 102 or 103 and only on the basis of prior art consisting of patents or printed publications." § 311(b) (emphasis added). Because we agree with Qualcomm that the Board erred in concluding that AAPA constitutes "prior art consisting of patents or printed publications" under § 311(b), we vacate the Board's decision. We remand for the Board to determine whether Apple's petition nonetheless raises its § 103 challenge "on the basis of prior art consisting of patents or printed publications." § 311(b) (emphasis added).

Background

Qualcomm owns the '674 patent, which is directed to integrated circuit devices with power detection circuits for systems with multiple supply voltages. See '674 patent at Abstract, col. 1 ll. 6-8. According to the '674 patent, modern integrated circuits often contain multiple networks operating at different supply voltages. See id. at col. 1 ll. 22-25. For example, a core logic network [*3]  may operate at a lower voltage, and an input/output network may simultaneously operate at a higher voltage. See id. Such a system can save power by allowing the broader circuit to power down a network, like the core logic network, when it is not needed. See id. at col. 1 ll. 26-40.

The patent describes "level shifters" that communicate between the input/output devices and the core devices. See id. at col. 1 ll. 28-29. When the core devices are powered down, the connection between the core and input/output network through the level shifters can lead to problems. One such problem is stray currents causing the level shifters to trigger the input/output devices for transmission resulting in erroneous output signals from the circuit. See id. at col. 1 ll. 29-40.

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